Also known as ALCT cards (Anode Local Charged Track).

Links:

Main Links:

• General description (below)
• Very detailed Specification document (latest version, prior versions can be found in same directory as alct2001_spec_*)
• Another general description may be found in Trigger TDR Chapter 11
• Calibration procedure
• ALCT database query and Mezzanine card database query

• Hardware:
• Valerie Iatsioura files: All ALCT2001 schematics and ALCT2001-384 layout
• Misha Kan files: mezzanine card, ALCT-672 layout, and ALCT-288 layout
• Firmware:
• Alex Madorsky files: firmware, testing code
• Boris Raczmyslovich files: Xilinx design files and JTAG register description
• private: Martin von der Mey and Gennady Zhmakhin firmware design files (use Explorer, not Netscape, for easy moving of files on ftp)
• Prototype testing: see various powerpoint presentations from July 2001 to January 2002.
• Production Testing:
• The latest test board schematics.
• Full, updated set of (zipped) ALCT Test Board design and layout files.
• Probably non-updated version of ALCT Test Board design and layout files from Gennady Zhmakin.
• Old testing plan.

• Software for testing the ALCT.
• Testing procedure for the ALCT.
• Older:
• Vlad Sedov layout files: zipped eps files (from Mar, 2001)

• ALCT2000-384 (384-channel version):
• detailed ALCT2000 design manual, simplified Users' guide, initial description
• ALCT2000-384 prototype board design schematics, bill of materials, OrCad design files: zipped files
• ALCT2000-384 FPGA design: Altera files
• ALCT2000 radiation test results web page and technical note
• ALCT99 (and CLCT99), which were 9U VME cards
• LCT48 (and CLCT48, from 1998)

In the CSC muon system, anode wires are hardwired together or `ganged' at the readout end in groups of 10-15 wires in order to reduce channel count. The algorithm used in determining muon segment position and bunch crossing in the anode view is shown below. Anode signals are fed into amplifier/constant-fraction discriminators. Since the drift time can be longer than 50 ns, a multi-layer coincidence technique in the anode LCT pattern circuitry is used to identify the bunch crossing. For each spatial pattern of anode hits, a low coincidence level, typically 2 layers, is used to establish timing, whereas a higher coincidence level, typically 4 layers, is used to establish the existence of a muon track.