Also known as AFEBs (Anode Front-End Boards).

Links:

Complete description: Trigger TDR Chapter 11

For more info, visit the anode front-end electronics web page from Carnegie-Mellon University

General Description:

In the CSC muon system, anode wires are hardwired together or ‘ganged’ at the readout end in groups of 10-15 wires in order to reduce channel count. Anode signals are fed into amplifier/constant-fraction discriminator ASICs. The anode hits are sent to the ALCT boards.

Each AFEB card contains one 16-channel preamplifier-shaper-discriminator ASIC. The small AFEB cards are mounted on the sides of the CSC chambers as close as possible to the anode wires themselves in order to minimize input signal path length and thus minimize noise levels. Typical thresholds are 20 fC compared to minimum ionizing signal of 100 fC. The anode amplifiers are similar to the ones on the CFEB boards, but optimized for the summed anode input capacitance and shaped with a peaking time of 30 ns. The amplifier outputs are sent into constant-fraction discriminators. Time walk between 20 fC and 100 fC levels is observed to be less than 4 ns. The output stage produces logic pulses with width variable between 35 ns and the total length of time that the anode signal exceeded threshold.

The logic pulses are sent from AFEB cards to the single on-chamber ALCT board using differential LVDS levels. The AFEB cards accept an analog test pulse input from the ALCT that is fed to the input of all amplifier channels simultaneously. Power levels of +5.5v and (in the case of ME1/1) -4.3v are required. The AFEB cards also accept a “stand-by” level that can be used to disable the ASIC, for instance, in case of latch-up. A single 40-pin cable between the ALCT and each AFEB carries the 16 differential discriminator output signals, power levels and ground, the threshold level, test pulse, and stand-by level.